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Measuring Phase Noise in PLLs | Modeling PLLs Using Mixed-Signal Blockset


Fundamentals of Phase Noise in PLL Systems


In this blog post, we will delve into the topic of phase noise and its significance in PLL (Phase-Locked Loop) systems. Phase noise is a critical factor to consider in mixed signal design, and understanding its impact on overall system performance is essential. Although phase noise is a vast and complex subject, we will only scratch the surface in this blog. Our goal is to introduce the process of measuring phase noise and provide a concise overview of its implications in a PLL system.

Measuring Phase Noise

To begin, let's discuss the process of measuring phase noise in a PLL system. In our case, we have a PLL model based on a charge pump, and we want to introduce a phase noise impairment and measure its impact on the system. The first step is to determine where to place the phase noise impairment. In this specific example, we choose to place it on the VCO (Voltage-Controlled Oscillator). By enabling the phase noise in the VCO settings, we can control the levels and offset frequencies. The next step is to measure the phase noise. Instead of directly measuring the spectrum and performing calculations to determine phase noise, we utilize a hybrid technique involving time domain and spectral processing. Within the mixed signal block set, there is a specific phase noise measurement block that we connect to our model. Before running the simulation, we need to configure several parameters. First, we specify the frequency offset at which we want to measure the phase noise. This offset should match the one entered in the VCO settings. Additionally, we set the resolution bandwidth, which should be equal to or smaller than the minimum frequency offset. To ensure accuracy, we choose a resolution bandwidth of 10 kHz. Furthermore, we set the number of spectral averages to improve the measurement quality. In this case, we select five spectral averages. Lastly, we set the hold-all-time parameter to avoid interference from the transient response of the PLL. By running the PLL for a short time, we determine the settling time and adjust the simulation time accordingly.

Results and Analysis

Now that we have configured the phase noise measurement block, we run the simulation and analyze the results. It is important to note that phase noise simulations can be time-consuming due to the need for collecting extensive data to achieve low-frequency offset resolution. In this example, we measure with a 10 kHz resolution, which can take a considerable amount of time. To ensure accurate results, we examine the transient response of the PLL before measuring phase noise. It is crucial to avoid measuring phase noise during any remaining transient response, as even a small amount of transit response can affect the measurement accuracy. By zooming in on the transient response, we can determine the settling time, which in this case is approximately six microseconds. After the simulation completes, we plot the phase noise results. The measured phase noise displays the roll-off and variations with respect to frequency offset. From the plot, we observe that the phase noise initially rolls off, peaks around one megahertz, and continues to decrease at a rate of approximately 30 dB per decade. There is a slight rise in phase noise around 800 kHz offset, followed by relatively stable behavior at lower frequencies.


In this video, we have explored the process of introducing and measuring phase noise in a PLL system. We have demonstrated how to enable a phase noise impairment, configure the measurement block, and analyze the results. However, this blog only scratches the surface of the larger topic of phase noise in PLL systems. In future blog posts, we will delve deeper into the mathematics and implementation details of phase noise, providing a comprehensive understanding of its impact on system performance. We will explore the inner workings of the phase noise measurement block and the VCO block, enabling you to gain a more in-depth knowledge of this crucial aspect of mixed signal design. Thank you for reading, and stay tuned for more informative blog posts on PLL systems and phase noise.

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