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Model Buildup and Charge Pump Impairment Modeling | Modeling PLLs Using Mixed-Signal Blockset

 This is the second part in the PLL Modeling Using Mixed-Signal Blockset™ series. This installment takes a more bottom-up approach to PLL modeling. Instead of starting with a high-level PLL architecture block, Kerry builds a PLL from its constituent building blocks, such as the phase/frequency detector and Charge Pump block. 

This approach is a little more tedious, but it offers a greater level of control over the design. He then introduces PLL impairment modeling and observes said impacts on time-domain performance. Initially, Kerry’s focus is on charge pump impairment modeling, such as in current imbalances and leakage currents. As a result, he observes more reference feedthrough at the PLL output. This is tantamount to increased spur levels at the reference frequency offset from the carrier. In subsequent videos in the series, the effects of different types of PLL impairments will be explored.

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