Adding Custom Impairments | Modeling PLLs Using Mixed-Signal Blockset

 This is the third part in the PLL Modeling Using Mixed-Signal Blockset™ series. This installment picks up where the second part left off. Kerry shows you how to look under the masks of Simulink® blocks to see how PLLs are modeled behaviorally. In particular, he takes a closer look at the Charge Pump block and phase/frequency detector. 

Kerry demonstrates how to break library links, which enable custom modifications to MathWorks-provided blocks. He inserts a delay asymmetry in the reset path of the dual-D flip-flop phase/frequency detector, showing the impact this has on time-domain PLL performance. In the next few videos in this series, he’ll show you how to assess PLL performance in the frequency domain as well.