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Generate HDL for a Deep Learning Processor

Implementing deep learning inference efficiently in edge applications requires collaboration between the design of the deep learning network and the deep learning processor.

Deep Learning HDL Toolbox™ enables FPGA prototyping of deep learning networks from within MATLAB®. To increase performance or target custom hardware, you can explore trade-offs in MATLAB to converge on a custom FPGA implementation of the deep learning processor. Then a single MATLAB function drives HDL Coder™ to generate an IP core with target-independent synthesizable RTL and AXI interfaces. It can also optionally run FPGA implementation to create a bitstream to program the deep learning processor onto the device.

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